Unlike the more commonly used and energy intensive bulk crystalline form of silicon carbide, 4H-SiC, its cubic form, 3C-SiC, can be readily deposited by heteroepitaxy on silicon wafers. However, due to a significant mismatch in lattice parameters and widely differing thermal expansion coefficients, this form has never been grown successfully for commercial purposes.
Anvil Semiconductors has developed a process that overcomes these dual challenges and enables the production of device quality 3C-SiC epitaxy on large diameter silicon substrates.
A polycrystalline SiC grid is used to divide the wafer into squares small enough to reduce the effect of lattice mismatch and thermal expansion but sufficiently large to fabricate complex devices. Thick (around 10µm) epitaxial layers have already been demonstrated on 100mm diameter wafers without bow and it is expected that the process can be readily migrated onto 150mm diameter wafers and potentially beyond.
The cubic form of SiC behaves much more like silicon and hence enables lower temperature processing and standard room temperature ion implantation equipment to be used. This enables the resulting wafers to be used to fabricate devices such as MOSFETS with a similar process architecture to that used in silicon. In fact the superior fundamental properties of SiC mean that far more equivalent devices can be made from the same size wafer and a 650V, 3C-SiC/Si MOSFET does not need the expensive and difficult Super Junction process used in silicon-based technology. The use of normal auto-registration techniques also makes a much more compact device when compared with those produced in 4H-SiC.